Topic: Help w/Porting a CPU

[dink]

Guys, I'm porting the TLCS90x841 processor (src/emu/cpu/tlcs90/tlcs90.* in mame) to FBAlpha, and need some assistance.

I got it to compile without any issues, but I don't know how to hook up the internal registers_r and _w.

At the top of tlcs90.c, theres an address map:

Code: [Select]

static ADDRESS_MAP_START(tmp90841_mem, AS_PROGRAM, 8, tlcs90_device)
//  AM_RANGE(   0x0000,     0x1fff          )   AM_ROM  // rom-less
AM_RANGE(   0xfec0,     0xffc0          )   AM_RAM  // 256b RAM (internal)
AM_RANGE(   T90_IOBASE, T90_IOBASE+47   )   AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END

then later in the source, there's
READ8_MEMBER( tlcs90_device::t90_internal_registers_r )
and  WRITE8_MEMBER( tlcs90_device::t90_internal_registers_w )

How do I hook that up?  It doesn't seem to be called anywhere within the cpu core itself. I don't understand how the cpu actually reads or writes IO..
But what confuses me is that its an internal handler, therefore, maybe it should be called from somewhere in tlcs90.c instead of my port handler? 

I would appreciate if you could take a look at this particular cpu core and give me a hand
Who knows, I could get good at this...

best regards,
- dink
[tlcs90.cpp is what I have so far, tlcs90.orig.c is the original one from mame]
I need to sort out the timers, io handlers and a few other things, but it compiles...

[kev]

In the header :
#define T90_IOBASE  0xffc0

So this:

something like :
AM_RANGE(   T90_IOBASE, T90_IOBASE+47   )   AM_READWRITE( t90_internal_registers_r, t90_internal_registers_w )
means something like:
Any reads/writes between memory addresses 0xffco and 0xffco+47 should be handled by the  t90_internal_registers read and write handlers.

[kev]

Also, as a bit more background, that CPU uses memory mapped IO instead of port mapped IO.

This explains it better than I can: http://en.wikipedia.org/wiki/Memory-mapped_I/O

[Arcadez]

Certainly when i ported this same CPU core into MAMEoXtras all i did was add the CPU src files TLSCS90.c/h then defined it
and the 4 TMP sound Cores it supports in the CPU decleration areas of the src then linked it with the driver
after that all i had to do was add some missing sound commands for Rapid Hero to the driver and bingo the game had sound
i never had to hook up the internal registers you mentioned

But of course im using a different src and a way older version of the CPU Core

[dink]

Thanks Kev, thats exactly what I needed to know

[iq_132]

If you're looking for an example in fba -- pic16c5x_intf would be a good place start ^^